
.section .text

.global riscv_spinup
riscv_spinup:
.option norelax
        csrci   sstatus, 0x2
        csrw    sie, zero

        lla     t0, 0f
        add     t0, t0, a3
        csrw    stvec, t0
        csrw    satp, a2
        sfence.vma
        unimp
.align 4
0:
        csrw    stvec, zero

        mv      t0, a0
        mv      sp, a1

        mv      a0, zero
        mv      a1, zero
        mv      a2, zero
        mv      a3, zero
        mv      a4, zero
        mv      a5, zero
        mv      a6, zero
        mv      a7, zero
        mv      s0, zero
        mv      s1, zero
        mv      s2, zero
        mv      s3, zero
        mv      s4, zero
        mv      s5, zero
        mv      s6, zero
        mv      s7, zero
        mv      s8, zero
        mv      s9, zero
        mv      s10, zero
        mv      s11, zero
        mv      t1, zero
        mv      t2, zero
        mv      t3, zero
        mv      t4, zero
        mv      t5, zero
        mv      t6, zero
        mv      tp, zero
        mv      gp, zero
        mv      ra, zero

        jr      t0

.section .note.GNU-stack,"",%progbits
