# B9L-RAM — ST7735S initialised by a second-stage lk2nd before Linux (RAM only) — PASS (2026-10-03) Image `b9/b9l/lk2nd-b9l-st7735s.img` **775986e2** = lk2nd 23.1 + `b9/b9l/lk2nd-23.1-aurora-b9l.patch`, without FORCE_FASTBOOT (`BUILD-B9L.md`). Nothing was written: aboot, boot, cache and eMMC are untouched (mmcblk0 write fields = 0); cache is still B9C b9ce13c9. ## Chain actually used (run `l1x`) power (RESET) → lk1st fastboot → [B9L-0 left the board in lk2nd 23.1 fastboot] → `fastboot boot` B9L image from lk2nd 23.1 → B9L lk2nd: ST7735S init → extlinux `b9c` from the eMMC cache → Linux B9C. This is one extra RAM stage compared with the planned "directly from lk1st" run. The operator asked to boot from the fastboot that was already running; the panel code path is identical. A direct-from-lk1st repeat is optional (`b9l-ram.sh 1 ram`). ## LK log (`l1x/uart-full.log`) ``` [70] [B9L +0 ms] before: L6 st=82 en=80 L17 st=82 en=80 vset=58 MPP4 mode=00 en=00 sink=00 [80] [B9L +10 ms] before: TLMM 12..15/116/118 cfg=1 (reset default) QUP4 spi CBCR=80000000 (off) [210] [B9L +140 ms] reset done (GPIO118 high) (1 → 1 ms → 0 → 1 ms → 1 → 120 ms) [220] B9L: gcc_blsp1_qup4_spi_apps_clk enabled at 16000000 Hz [230] [B9L +160 ms] after QUP init: TLMM 12/13/15=344 (func1 12 mA) 14=204 (func1 2 mA) 116/118=2c0 out high; CBCR=00000001 RCGR cfg=00002113 [360] [B9L +290 ms] 19 init commands sent, 0 failures; SPI_IO_CONTROL=401 SPI_CONFIG=0 (== stock LK) [400] [B9L +330 ms] frame 128x128 RGB565 (32768 bytes) sent ret=0 [430] [B9L +360 ms] after backlight: L6 st=82 en=80 L17 st=82 en=80 MPP4 mode=61 en=80 sink=07 (== stock LK) [450] [B9L +380 ms] ST7735S bring-up end - continuing lk2nd boot [710] Trying to boot 'b9c' → [1580] booting linux @ 0x80000000 ``` **Power question answered:** at LK time **L17 is ON** (STATUS 0x82, EN 0x80) and L6 is ON. They are left on by SBL1/RPM, as the CAF comment says ("enabled in SBL"). No RPM/L17 workaround is needed in LK. The L17-OFF reading of B9A was taken in running Linux without a panel consumer, so L17 is switched off somewhere between LK and that point (not investigated; irrelevant now because Linux holds L17). ## Linux takeover (UART kernel time) | t | event | |---|---| | 0.72 s | spi_qup 78b8000.spi | | 1.07 s | `l17: Bringing 0uV into 2850000-2850000uV` (regulator taken by the panel) | | 1.11 s | clk: disabling unused clocks | | 1.42 s | `[drm] Initialized panel-mipi-dbi` | | 1.78 s | `Console: switching to colour frame buffer device 21x16` (fbcon modeset = panel reset + re-init) | | 7.35 s | aurora-display: backlight on → DISPLAY READY (no unblank needed) | Then: START OK 73.0 s, AP ENABLED 77.1 s, MPSS + WCNSS running, ping 4/4, display errors 0, eMMC w=0. ## Operator (visual) 1. The test frame with backlight appeared **before Linux**. 2. Colours, orientation and border are correct (same chart as the Linux B9B test). 3. It stayed "about a second or a bit more", then the screen was dark "for about a second", then the Linux console. The dark gap is the Linux-side handoff: the panel is re-initialised at the fbcon takeover, and MPP4 is set to off by the gpio-backlight pinctrl state until aurora-display switches it on. The exact moment of the backlight-off was not logged. The observed gap was shorter than the ~6 s estimate. ## Verdict PASS: image before Linux, held until the Linux takeover, Linux DRM/fbcon normal, LTE/Wi-Fi/B9C unaffected, no writes. lk1st is NOT reflashed (needs a separate GO). Optional improvement for later: keep the backlight on across the handoff on the Linux side. ## Formal run `ram1` (2026-10-03 22:16 UTC): directly from lk1st — PASS → B9L-RAM CLOSED - Image `lk2nd-b9l-swag.img` **e6849a2b**: the same panel code as 775986e2, frame = operator splash `splash/swag.png` (RGB565 via `splash/mk-splash.py`, blob 87955300). Driver `b9l-ram.sh 1 ram` with a gate: `fastboot boot` only when product == lk1st-msm8916. - Chain: RESET power-on → `product=lk1st-msm8916` → `fastboot boot` → B9L lk2nd (UART: exactly 2× "welcome to lk") → `Trying to boot 'b9c'` → Linux. Class A (RTC 5 s). - LK: L6/L17 st=82 en=80; 16 MHz; `SPI_IO_CONTROL=401 SPI_CONFIG=0`; 19 commands, 0 failures; `frame source: splash image`, sent ret=0; MPP4 61/80/07; bring-up 380 ms. - Operator: splash visible before Linux. - Linux: DRM 1.41 s, fbcon 21x16 1.74 s, DISPLAY READY 8.08 s (no unblank), display errors 0; START OK 75.6 s, AP ENABLED 79.7 s, SNTP OK, MPSS+WCNSS running, ping 4/4, eMMC w=0. Nothing was flashed. Reflashing lk1st with this code needs a separate GO.