# B10 cache write — preflight (2026-10-04) — reviewed, NOT executed ## Candidate / rollback - Candidate `b10/b10b3/cache-v4/cache-extlinux-b10b5.img` **c37325156a6f4c013982cf01bcb5b2ddb026b0298e9c3ec0be87f57d693464b8** (134217728 B) = B9C + kernel 7.2.7-aurora-b10b5 (v4, FAULT safe clamp) + production DTB e47762d1; no test hooks (B10B5-RESULT.md, production RAM smoke PASS). - Live cache today: B9C **b9ce13c9** — rollback image `b9/b9c/cache/cache-extlinux-b9c.img` and the B9C write readback `logs/b9/b9c/W/11-cache-readback.bin` (both b9ce13c9, checked). The script also saves the live cache read right before the write as `logs/b10/b10b5/W/pre-cache.bin`. ## Scripts (on 480s; b10/b10b5/) - `B10-write.sh` 295ed53b — 1:1 from `b9/b9c/cache/B9C-write.sh`; changed only: image + NEW_SHA, OLD_SHA = B9C b9ce13c9, rollback/backup paths (B9C), **ABOOT_SHA = 15208dbb (lk1st-b9l since B9L-PERSIST; B9C used 3b8cd266)**, log dir `logs/b10/b10b5/W`, rollback hint, final marker. Gates (stop at first failure): G0 loader 53f19350 / candidate sha+size / rollback image / B9C readback backup / 9008 present; G1 printgpt, serial 0x or firehose, cache geometry 0x4118c000+0x8000000, GPT primary == A3, boot == e9579f33 (emmc1), aboot == 15208dbb, **live cache == b9ce13c9** (= backup); W: `edl w cache` only → readback → cmp == candidate (CACHE_MATCH) else STOP "do NOT reboot; run rollback"; V: GPT primary/backup, tzbak, boot, aboot, sbl1 rpm tz hyp recovery modemst1 modemst2 fsg fsc persist == A3, modem system userdata == A4pre; SHA256SUMS → `B10_CACHE_WRITE_VERIFIED`. Offline G0 check done: loader, candidate, rollback image, backup and all A3/A4pre references OK. - `B10-rollback.sh` 37e0e165 — 1:1 from B9C-rollback.sh: rollback image hash gate → 9008 gate → `edl w cache` B9C → readback cmp → `CACHE_RESTORED_B9C`. - `b10-cold-boot.sh K` — observation of the normal power-on (MODE=cold: aborts if fastboot appears = RESET held); RTC class, LTE/Wi-Fi/display/charger snapshot. Never `edl reset`; never `dd` from Linux. ## Physical sequence — install (verified B9C HW EDL workflow) Battery is required during EDL (the board does not start from USB alone, NOTES.md:483). Minimum battery handling inside the verified procedure: 2× out/in. 1. Board running; operator: USB OFF (unplug the board's USB cable). 2. Battery OUT (board off), then battery IN — board stays off (no USB). Check the contact sits firmly. 3. Hold D+ to GND, plug USB, release D+ → host shows 05c6:9008. Claude runs `b10/b10b5/B10-write.sh` (≈ 10–15 min incl. verify reads). 4. Only after `B10_CACHE_WRITE_VERIFIED`: USB OFF → battery OUT → wait ≥ 90 s (this is also the class-A condition). 5. Claude starts `b10-cold-boot.sh 1`; operator: battery IN → USB ON, **no RESET, no D+**. Normal power-on → lk1st → lk2nd extlinux → b10b5 from cache. If step 3 prints a STOP before W: nothing was written → USB OFF, battery out/in, USB ON → B9C boots as before. If CACHE READBACK MISMATCH: do NOT power off; keep 9008 and run the rollback below immediately. ## Physical sequence — rollback to B9C b9ce13c9 (if needed) 1. Board running (or off): USB OFF → battery OUT → battery IN (board off). 2. D+ to GND, plug USB, release → 9008. Claude runs `b10/b10b5/B10-rollback.sh` → `CACHE_RESTORED_B9C`. 3. USB OFF → battery OUT ≥ 90 s → battery IN → USB ON (no RESET) → B9C boots. ## Not used (recorded only) - Battery out for the whole EDL → flash → power-off span: impossible (EDL needs the battery). - `fastboot oem reboot-edl` from lk1st (verified for EDL entry and reads in A3 / S1 / S3 sessions, NOTES.md:530/569/866) would avoid steps 1–2, but no cache write was ever done through it → not used.