105bef466a
Sanitized research log, build/reproducibility docs, DTS, kernel configs, patches, initramfs sources, bootchain migration plans and test logs. B5 direct boot PASS; B6 modem lifecycle in progress. No dumps, NV/EFS, vendor firmware or device identifiers included.
97 lines
2.6 KiB
C
97 lines
2.6 KiB
C
#ifndef __CONFIG_H
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#define __CONFIG_H
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#define BOARD lk1st-msm8916
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#define LK 1
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#define USE_LE_SYSTEMD 0
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#define MOUNT_EMMC_LE 0
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#define TARGET_USE_SYSTEM_AS_ROOT_IMAGE 0
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#define ENABLE_KASLRSEED_SUPPORT 1
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#define WITH_DEBUG_LOG_BUF 1
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#define WITH_DEBUG_UART 1
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#define ENABLE_FBCON_LOGGING 1
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#define DEVICE_TREE 1
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#define CRYPTO_BAM 1
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#define SPMI_CORE_V2 1
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#define BAM_V170 1
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#define ABOOT_IGNORE_BOOT_HEADER_ADDRS 1
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#define LONG_PRESS_POWER_ON 1
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#define MMC_SDHCI_SUPPORT 1
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#define _EMMC_BOOT 1
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#define PON_VIB_SUPPORT 1
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#define PLATFORM_USE_SCM_DLOAD 1
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#define USE_PON_REBOOT_REG 1
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#define WITH_DEBUG_LOG_BUF 1
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#define LK_LOG_BUF_SIZE 32768
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#define GENERATE_CMDLINE_ONLY_FOR_ANDROID 1
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#define DISABLE_SPLASH_PARTITION 1
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#define FASTBOOT_HELP 1
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#define DISPLAY_TYPE_MIPI 1
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#define DISPLAY_TYPE_DSI6G 1
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#define MEMSIZE 0x00100000
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#define MEMBASE 0x8F600000
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#define BASE_ADDR 0x80000000
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#define SCRATCH_ADDR 0x90000000
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#define ARM_CPU_CORE_A7
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#define PERIPH_BLK_BLSP 1
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#define WITH_CPU_EARLY_INIT 0
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#define WITH_CPU_WARM_BOOT 0
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#define MMC_SLOT 1
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#define PANIC_REBOOT_MODE EMERGENCY_DLOAD
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#define DISPLAY_TYPE_MDSS 1
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#define DTBO_DISABLED 1
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#define ARM_CPU_CORTEX_A8 1
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#define ARM_WITH_CP15 1
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#define ARM_WITH_MMU 1
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#define ARM_ISA_ARMV7 1
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#define ARM_WITH_VFP 1
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#define ARM_WITH_NEON 1
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#define ARM_WITH_THUMB 1
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#define ARM_WITH_THUMB2 1
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#define ARM_WITH_CACHE 1
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#define ARM_WITH_L2 1
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#define ASSERT_ON_TAMPER 1
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#define ABOOT_STANDALONE 1
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#define GPL 1
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#define LK2ND_BOOT_MEM_SIZE 0x03200000
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#define LK2ND_BUNDLE_DTB "./build-lk1st-msm8916/lk2nd/device/dts/msm8916/msm8916-512mb-mtp.dtb"
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#define CPU_BOOT_CORTEX_A 1
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#define PROJECT_LK1ST_MSM8916 1
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#define TARGET_MSM8916 1
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#define PLATFORM_MSM8916 1
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#define ARCH_ARM 1
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#define WITH_APP_ABOOT 1
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#define WITH_DEV_FBCON 1
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#define WITH_DEV_GCDB_DISPLAY 1
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#define WITH_DEV_KEYS 1
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#define WITH_DEV_PMIC_PM8X41 1
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#define WITH_DEV_VIB 1
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#define WITH_LIB_BCACHE 1
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#define WITH_LIB_BIO 1
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#define WITH_LIB_DEBUG 1
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#define WITH_LIB_FS 1
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#define WITH_LIB_FS_EXT2 1
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#define WITH_LIB_HEAP 1
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#define WITH_LIB_LIBC 1
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#define WITH_LIB_LIBFDT 1
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#define WITH_LIB_PARTITION 1
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#define WITH_LIB_PTABLE 1
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#define WITH_LIB_ZLIB_INFLATE 1
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#define WITH_LK2ND 1
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#define WITH_LK2ND_BOOT 1
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#define WITH_LK2ND_DEVICE 1
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#define WITH_LK2ND_FASTBOOT 1
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#define WITH_LK2ND_FASTBOOT_DEBUG 1
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#define WITH_LK2ND_HW_BDEV 1
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#define WITH_LK2ND_HW_GPIO 1
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#define WITH_LK2ND_HW_I2C 1
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#define WITH_LK2ND_HW_REGULATOR 1
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#define WITH_LK2ND_RAMOOPS 1
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#define WITH_LK2ND_RNG_SEED 1
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#define WITH_LK2ND_SERIALNO 1
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#define WITH_LK2ND_SMP 1
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#define WITH_LK2ND_SMP_SPIN_TABLE 1
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#define WITH_LK2ND_VERSION 1
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#define MEMRWOFF .
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#define DEBUG 1
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#define _EMMC_BOOT 1
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#endif
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