4a7224c41f
- B9A: read-only audit of stock LK/DT: the panel is an ST7735S 128x128 on SPI (BLSP1 QUP4, 16 MHz, mode 3, D/C GPIO116, RESET GPIO118), backlight = PM8916 MPP4 current sink 40 mA. - B9B: upstream panel-mipi-dbi with the stock init sequence as firmware; MPP4 sink via pinctrl + gpio-backlight; first light with correct colours/orientation/offsets. - B9C: fbcon (6x8, 21x16) on tty1 + getty, UART console kept, aurora-display service; cache B9C b9ce13c9 written and verified, cold boots with LTE + Wi-Fi + display. - B9L (RAM only): lk2nd second stage with an msm8916 SPI panel port shows a picture before Linux. - Sanitizer: whitelist for b8/ and b9/.
257 lines
7.8 KiB
Text
257 lines
7.8 KiB
Text
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Project Aurora — JZ08AU-XPA-7J-R3 (MSM8916, 512 MB, ST7735S SPI panel).
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* B9B (RAM test only) = B8B + SPI ST7735S panel (panel-mipi-dbi) + MPP4 backlight. B8B: bam1 + Pronto/WCNSS remoteproc + Iris (no WLAN stack, no NV).
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* Base was RAM-BOOT MODEM1: EMMC1 + MPSS remoteproc (native Aurora firmware, rmtfs -r). No BAM-DMUX/WWAN/WCNSS. Everything that could touch
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* storage, radios or power management is explicitly disabled.
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*
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* Hardware facts from stock Aurora dtb_01 (see NOTES.md S2.1/S12):
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* console = BLSP1 UART2 serial@78b0000, GPIO4 (TX) / GPIO5 (RX), 115200 8N1.
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* RAM size (memory@80000000 reg) is filled in by lk2nd from SMEM.
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include "msm8916-pm8916.dtsi" /* + RPM regulators (USB PHY L7/L13) */
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/ {
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model = "JZ08AU Aurora (RAM boot B9B)";
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compatible = "jz08au,aurora", "qcom,msm8916";
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chassis-type = "embedded";
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aliases {
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serial0 = &blsp_uart2;
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mmc0 = &sdhc_1; /* eMMC */
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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/*
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* B8B: WCNSS/Pronto carve-out at the stock Aurora address. Stock dtb_01 "peripheral_mem"
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* (pronto PIL region) = 0x8b600000 size 0x600000; wcnss.mdt is linked at 0x8b600000.
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* Directly follows mpss_mem (0x86800000 + 0x4e00000 = 0x8b600000) -> no overlap.
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* Same fixed-address pattern as upstream msm8916-longcheer-l8150.dts.
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*/
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reserved-memory {
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/delete-node/ wcnss;
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wcnss_mem: wcnss@8b600000 {
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reg = <0x0 0x8b600000 0x0 0x600000>;
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no-map;
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};
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};
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};
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&blsp_uart2 {
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pinctrl-0 = <&blsp_uart2_console_default>;
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pinctrl-1 = <&blsp_uart2_console_sleep>;
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pinctrl-names = "default", "sleep";
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status = "okay";
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};
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/* --- RAM boot MODEM1 safety: no SD slot, no Wi-Fi, no modem data plane --- */
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/* sdhc_1 (eMMC): enabled below, READ-ONLY enforced by initramfs (blockdev --setro) */
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&sdhc_2 { status = "disabled"; };
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/* usb: see peripheral block below */
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/* mpss: enabled below */
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&bam_dmux { status = "okay"; }; /* B4b1: data-plane mux driver (no bearer) */
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&bam_dmux_dma { status = "okay"; };
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/* wcnss: enabled below (B8B) */
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/*
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* USB peripheral only (ChipIdea ci-hdrc + qcom,usb-hs-phy-msm8916, upstream bindings).
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* Stock Aurora: HSUSB_1p8 = L7 1.8 V, HSUSB_3p3 = L13 3.075 V, otg-control = 2 (PMIC VBUS detect),
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* PHY init-seq identical to upstream. VBUS detect via PM8916 USB_IN (as on JZ02). No host, no role switch.
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*/
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&pm8916_usbin {
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status = "okay";
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};
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&usb {
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dr_mode = "peripheral";
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extcon = <&pm8916_usbin>;
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status = "okay";
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};
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&usb_hs_phy {
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extcon = <&pm8916_usbin>;
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};
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/*
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* Internal eMMC (stock: bootdevice=7824900.sdhci, qcom,bus-width 8, nonremovable,
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* vdd = 8916_l8 2.85-2.9 V, vdd-io = 8916_l5 1.8 V). Upstream msm8916.dtsi already provides
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* bus-width = <8>, non-removable, mmc-ddr-1_8v (no HS200 = conservative), sdc1 pinctrl;
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* msm8916-pm8916.dtsi provides vmmc = pm8916_l8, vqmmc = pm8916_l5. Only enable it here.
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*/
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&sdhc_1 {
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status = "okay";
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};
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/*
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* MPSS (modem) remoteproc, native Aurora firmware from the RO-mounted modem FAT.
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* mpss_mem: stock Aurora "modem_adsp_region" base 0x86800000 size 78 MiB (0x4e00000);
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* Aurora modem.mdt load span 0x86800000..0x8b300000 (75 MiB), same as stock PIL log.
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* mba_mem: upstream dynamic 1 MiB. pll-supply (pm8916_l7), cx/mx rpmpd from msm8916(-pm8916).dtsi.
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* Driver has auto_boot = false: MSS starts only when rmtfs (-s) requests it.
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* BAM-DMUX stays disabled (no data plane at this stage).
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*/
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&mba_mem {
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status = "okay";
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};
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&mpss_mem {
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reg = <0x0 0x86800000 0x0 0x4e00000>;
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status = "okay";
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};
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&mpss {
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pinctrl-0 = <&sim_ctrl_default>;
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pinctrl-names = "default";
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status = "okay";
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};
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/*
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* SIM routing as found on stock Aurora (dtb_01 gpio-leds default-state and live
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* Android /sys/kernel/debug/gpio): gpio1 (sim3_switch) high, gpio20 (sim_hotdet),
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* gpio22 (sim1_switch), gpio23 (sim2_switch) low. Passive routing only.
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*/
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&tlmm {
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sim_ctrl_default: sim-ctrl-default-state {
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sim-low-pins {
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pins = "gpio20", "gpio22", "gpio23";
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function = "gpio";
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bias-disable;
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output-low;
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};
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sim-high-pins {
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pins = "gpio1";
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function = "gpio";
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bias-disable;
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output-high;
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};
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};
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};
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/*
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* B8B: Pronto (WCNSS) remoteproc + Iris RF. Firmware = default "wcnss.mdt" from /firmware/image (RO FAT).
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* Supplies come from msm8916-pm8916.dtsi and match stock dtb_01: vddpx/vddxo = L7 1.8 V, vddrfa = S3,
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* vddpa = L9 3.3 V, vdddig = L5 1.8 V.
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* Iris compatible: stock DT has none (generic qcom,wcnss_wlan + qcom,has-autodetect-xo). Stock voltages exclude
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* WCN3660 (vddpa 2.9-3.0 V, vdddig 1.2 V); WCN3620 vs WCN3680 have identical vregs (differ in 48 MHz XO);
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* stock Pronto FW caps lack DOT11AC -> WCN3620 (controlled hypothesis, see logs/b8/b8b).
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* WLAN/cfg80211/wcn36xx are NOT in this kernel; wcnss_ctrl NV download is expected to fail (no NV in rootfs).
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*/
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&wcnss {
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status = "okay";
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};
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&wcnss_iris {
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compatible = "qcom,wcn3620";
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};
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/*
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* B9B: built-in display, reconstructed from stock Aurora LK (aboot) + stock dtb_01 (logs/b9/b9a/B9A-RESULT.md).
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* Panel: ST7735S 128x128 on BLSP1 QUP4 (spi@78b8000), MIPI-DBI type C 4-wire: GPIO12 MOSI, 13 MISO, 14 CS0 (native), 15 CLK;
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* D/C = GPIO116 (stock "disp_dc"), RESET = GPIO118 (stock "disp_rst_n"). Stock LK: 16 MHz, SPI mode 3, TX only.
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* Supplies per stock dtb_01 qcom,mdss_spi: vdd = 8916_l17 2.85 V, vddio = 8916_l6 1.8 V.
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* Init sequence = exact stock 19 commands (firmware file jz08au,aurora-st7735s.bin, without trailing RAMWR).
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* GRAM offset X=2 / Y=3 (stock CASET 2..129, RASET 3..130) via panel-timing back porches (panel-mipi-dbi convention).
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* Backlight: PM8916 MPP4 current sink 40 mA as in stock LK (MODE_CTL 0x61, SINK_CTL 7, EN_CTL 0x80 when on).
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* B9B step 1: backlight is NOT linked to the panel -> stays off (MODE_CTL 0x60) until enabled by hand via sysfs after readback.
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*/
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&pm8916_rpm_regulators {
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pm8916_l17: l17 {
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regulator-min-microvolt = <2850000>;
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regulator-max-microvolt = <2850000>;
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};
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};
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&tlmm {
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/* stock spi0_active: gpio12/13/15 func blsp_spi4 12 mA; spi0_cs0_active: gpio14 func blsp_spi4 2 mA (native CS0) */
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blsp_spi4_b9b_default: blsp-spi4-b9b-default-state {
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spi-pins {
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pins = "gpio12", "gpio13", "gpio15";
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function = "blsp_spi4";
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drive-strength = <12>;
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bias-disable;
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};
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cs-pins {
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pins = "gpio14";
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function = "blsp_spi4";
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drive-strength = <2>;
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bias-disable;
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};
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};
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/* stock pmx_mdss active: gpio116 (D/C) + gpio118 (RESET), func gpio, 8 mA, no bias */
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lcd_b9b_default: lcd-b9b-default-state {
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pins = "gpio116", "gpio118";
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function = "gpio";
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drive-strength = <8>;
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bias-disable;
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};
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};
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&blsp_spi4 {
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pinctrl-0 = <&blsp_spi4_b9b_default>;
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pinctrl-1 = <&blsp_spi4_sleep>;
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pinctrl-names = "default", "sleep";
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status = "okay";
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panel@0 {
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compatible = "jz08au,aurora-st7735s", "panel-mipi-dbi-spi";
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reg = <0>;
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spi-max-frequency = <16000000>;
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spi-cpol;
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spi-cpha;
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write-only;
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dc-gpios = <&tlmm 116 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&tlmm 118 GPIO_ACTIVE_HIGH>; /* mipi-dbi drives 0 = in reset, 1 = run */
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pinctrl-0 = <&lcd_b9b_default>;
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pinctrl-names = "default";
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power-supply = <&pm8916_l17>;
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io-supply = <&pm8916_l6>;
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format = "r5g6b5";
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width-mm = <26>; /* 1.44" diagonal, square */
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height-mm = <26>;
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panel-timing {
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hactive = <128>;
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vactive = <128>;
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hback-porch = <2>; /* GRAM column offset */
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vback-porch = <3>; /* GRAM row offset */
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clock-frequency = <0>;
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hfront-porch = <0>;
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vfront-porch = <0>;
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hsync-len = <0>;
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vsync-len = <0>;
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};
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};
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};
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&pm8916_mpps {
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/* MPP4 current sink: mode 6 (sink), source sel 0, SINK_CTL = 7 (40 mA); output-low = sink off at probe */
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lcd_bl_mpp4_default: mpp4-sink-state {
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pins = "mpp4";
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function = "sink";
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drive-strength = <7>;
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output-low;
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};
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};
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/ {
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lcd_backlight: backlight {
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compatible = "gpio-backlight";
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gpios = <&pm8916_mpps 4 GPIO_ACTIVE_HIGH>;
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pinctrl-0 = <&lcd_bl_mpp4_default>;
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pinctrl-names = "default";
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};
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};
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