uzbek-plus/logs/b10/b10b0/B10B0-RESULT.md

B10B0-RESULT — PM8916 VADC/IIO + PMIC temp-alarm, RAM only

Date: 2026-10-03. Verdict: PASS (DMM comparison limited by a 10 mV DMM measured at a board VBAT pad, see below). Nothing persistent changed: aboot lk1st-b9l 15208dbb and cache B9C b9ce13c9 untouched, eMMC writes = 0 (mmcblk0 w=0 in every dump/snapshot). No manual writes to charger/BMS registers. pm8916_lbc / pm8916_bms_vm not built; pm8916_usbin unchanged.

Image

• kernel 7.2.7-aurora-b10b0 = b9c + CONFIG_IIO, CONFIG_QCOM_SPMI_VADC (→ QCOM_VADC_COMMON), CONFIG_QCOM_SPMI_TEMP_ALARM (fragment linux/aurora-b10b0.config; .config diff vs b9c = exactly these 4 + LOCALVERSION).
• DTB linux/dts/msm8916-jz08-aurora-b10b0.dts = B9B DTB (7ca9cc79, same as B9C) + &pm8916_vadc { channel@6 VBAT_SNS, pre-scaling 1/3 } + model.
• initramfs + cmdline = exact B9C. Image b10/b10b0/out/aurora-b10b0.img a360aee2 (build b10/b10b0/build-b10b0.sh). out/ holds the B8F initramfs (PSK) → never publish.
• Driver b10/b10b0/b10b0-boot.sh K (from b9c-boot.sh, ram only), dump b10b0-dump.sh, series b10b0-cal.sh N P.

Runs

• ram1 (05:32, class A, RTC 34 s): probe + diff OK (post-probe-ram1.txt). Then the board stayed in the RAM boot ≈7.7 h; the operator's DMM probe shorted VBAT to GND at 13:13 → UVLO power-off (POFF2 0x80d = 0x28: UVLO + CHARGER bit), auto power-on from USB (class B) into the normal cache B9C. No damage (no heat/smell, board boots normally). Calibration series lost → repeated.
• ram2 (10:24 480s clock / 13:25 local, class A, RTC 6 s): full run, calibration series 12 × 20 s.

Checks (ram2)

1. IIO: iio:device0 = 200f000.spmi:pmic@0:adc@3100; channels 0 usb_in, 6 vbat_sns (raw only, no _input: upstream spmi-vadc has no scaling for VBAT_SNS), 7 vph_pwr, 8 die_temp, 9/10 refs, 14 gnd, 15 vdd. No errors in dmesg.
2. VBAT: raw 37688–37761; processed by the driver's own calibration (ch9 625000 µV @ raw 31246, ch10 1250000 µV @ 37738 → 96.272 µV/code, ×3 pre-scaling): mean 3.7507 V, σ 7.4 mV (12 samples). VPH (ch7, driver _input) mean 3.7523 V, σ 6.8 mV. USB_IN (ch0) 4.989 V.
3. PMIC temperature: pm8916-thermal zone + in_temp8_input: 32.7–34.7 °C during the series.
4. Register diff vs baseline (B9C cache boot, baseline-b9c.txt, 48 peripheral blocks): changes only in
   • temp-alarm 0x24xx: 0x2440 01→43 (threshold set 3 + stage-2 override), 0x2446 01→80 (force enable), 0x2411/12/15/16 IRQ config;
   • VADC 0x31xx: IRQ config 0x3111/12/15/16, CH_SEL/mode/data 0x3148/50/60/61;
   • dynamic data/state: 0x0807/080c PON reasons (class A vs B), 0x1009/100b/1010/1308 charge state (now charging, FAST_CHG_ON), 0x3260/0x3360/61 (other ADC instances' data), 0x40xx BMS FIFO/OCV/state, 0x6010/48/49 RTC, 0x7309 status;
   • 0x1642 00→80 (MISC BOOT_DONE) and 0x1643 00→0b: written by lk1st, not by B10B-0 — target_fastboot_init() → pm8x41_set_boot_done() runs whenever lk1st enters fastboot (RESET-held RAM boots). Normal cache boots leave it 0.
   • charger/BMS configuration registers: unchanged (VDD_MAX/SAFE, IBAT_MAX/SAFE, VIN_MIN, CHG_CTRL, CHG_FAILED, VBAT_WEAK, IBATTERM_EN 0x105B, TCHG 0x1060/61, WDOG, PERPH_RESET, COMP_OVR1 0x10EE, BAT_IF BTC, USB 0x134x, BMS 0x4040/46/47/55/56).
5. LTE START OK 63.2 s, ping 4/4 via wwan0; Wi-Fi AP aurora-b8f enabled 67.7 s, Pronto running; display: operator read the SAMPLE n/12 screens on the panel; SNTP 12 replies.
6. eMMC writes = 0.

Temp-alarm note: the upstream driver (GEN1 subtype) raises the PMIC over-temperature thresholds from set 1 (110/130/150 °C) to set 3 (120/140/160 °C) and overrides the stage-2 HW shutdown; stage-3 HW shutdown (160 °C) and the DT critical trip 145 °C (orderly kernel poweroff) remain. Same on every upstream msm8916 board; acceptable, recorded.

VBAT calibration (cal-ram2.txt, cal-ram2-analysis.txt)

DMM reference: operator's multimeter, board VBAT test pad vs GND (battery terminals not reachable), 10 mV resolution, 10 readings: 3.73, 3.74, 3.74, 3.74, 3.70, 3.70, 3.74, 3.70, 3.70, 3.70 → mean 3.719 V, σ 20 mV (display toggling 3.70/3.74). Board was charging (CC, FAST_CHG_ON) during the series.

	value
VADC VBAT mean / σ	3.7507 V / 7.4 mV
DMM mean / σ	3.719 V / 20 mV
VADC − DMM	+31.7 mV (+0.85 %) — within the combined uncertainty of a 2-digit DMM (±10 mV LSB, typ. ±0.5 % +2 d ≈ ±40 mV) and pad/ground-return drop while charging
BMS FIFO (raw, newest, last 6 samples)	13194
FIFO coefficient	284.3 µV/LSB vs VADC, 281.9 µV/LSB vs DMM (upstream driver assumes 300 → +5.5 % too high; uncalibrated downstream 292.97)

The FIFO coefficient agrees with the B10A estimate from the CV plateau (285.7 µV/LSB). For better than ~1 % accuracy against an external reference a 3½+-digit DMM on the battery terminals with charging stopped would be needed.

Side observation (not caused by B10B-0; for B10B-2 planning)

• Operator's USB meter showed ≈0.08 A during the ram2 series while the LBC reported fast charging (CC); cache boots after class A showed up to 0.41 A. In ram1 the board ran ≈7.7 h on USB and VBAT still fell to ≈3.7 V.
• Hypothesis: once BOOT_DONE is set (lk1st fastboot path), the LBC obeys the programmed IBAT_MAX = 90 mA (SBL1 default) instead of its pre-boot-done autonomous current, so the USB input is capped near 90 mA and the board load drains the battery. To verify in B10B-2 (the upstream LBC driver would program IBAT_MAX anyway). Consequence now: RAM-boot tests via RESET/fastboot run with BOOT_DONE = 1, unlike the production cache boot — keep this in mind when comparing charger behaviour.