8d7721c775
B7A: QMI DMS time vs VNIIFTRI NTP (DMS = UTC - 0.28 s, sigma 1 ms; NITZ = DMS truncated to 1 s). B7B: a 1970 -> 2026 date -s step is harmless for the modem stack. B7C: aurora-modem probes DMS/NITZ along the start flow and steps CLOCK_REALTIME once at the first valid sample (REG registered/attached), never RTC; background SNTP check (query only) after START OK. 3/3 class-A cold boots PASS (residual +0.04/+0.36/+0.84 s), cache 14fe453a written (B7C_WRITE_VERIFIED) and verified by a normal power-on (V1, +0.26 s). Also publishes the prerequisite R2 (boot-hang / lk eMMC investigation, T4 telnet baseline that B7C builds on) and R3 (autonomous cold boot, NCM loss) material, and extends tools/publish-sanitize.py to r2/, r3/, b7/. Binary images, initramfs, busybox and raw logs stay out (see b7/*/SHA256SUMS).
27 lines
2 KiB
Markdown
27 lines
2 KiB
Markdown
# R2/T4: read-only eMMC baseline (2026-10-02 11:27, via telnet over NCM)
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Board: RAM-booted r2/t4/out/aurora-mm1-t4telnet.img (6db01841, `fastboot boot`, nothing written); CH340 TX disconnected.
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Raw output: emmc-snapshot-20261002-112757.txt. Boot: RTC 979 s at start (class B, fastboot path), uptime 189 s at snapshot.
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| Field | Value | Meaning |
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|---|---|---|
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| CID | <EMMC_CID> | Hynix (0x90), OEM 0x014a, H4G2a, PRV 0x2, PSN <EMMC_SERIAL>, MDT 05/2018 (lk prints "05 2002" — older decode) |
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| EXT_CSD_REV [192] | 0x06 | eMMC 4.5 |
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| PRE_EOL_INFO [267] | 0x00 | not defined |
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| LIFE_TIME_EST_A/B [268/269] | 0x00 / 0x00 | not defined |
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| RST_n_FUNCTION [162] | 0x01 | RST_n permanently ENABLED (OTP): the card resets on a low pulse on its RST_n pin |
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| PARTITION_CONFIG [179] | 0x38 | boot from user area, no boot ack |
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| HS_TIMING [185] / BUS_WIDTH [183] / DEVICE_TYPE [196] | 0x02 / 0x02 / 0x17 | HS200, 8-bit SDR |
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| CACHE_CTRL [33] / POWER_OFF_NOTIFICATION [34] | 0x01 / 0x01 | cache on, power-off notification enabled |
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| SEC_COUNT | 7634944 | 3.64 GiB |
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Linux ios: HS200 8-bit, 177.77 MHz, VDD 2.9–3.0 V, signal 1.8 V, driver type B.
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debugfs err_stats (189 s): all 15 counters = 0. dmesg: 0 mmc/sdhci error/timeout/CRC/tuning/reset lines. mmc-utils not installed (not needed).
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## Conclusions
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- Wear/health: **no data** — EXT_CSD rev 6 (eMMC 4.5) has no PRE_EOL/LIFE_TIME fields (0x00 = undefined, not "new").
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Health cannot be judged by EXT_CSD on this part. There are also no runtime error signs.
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- RST_n_FUNCTION = 0x01: closes the T3B §4 question. The bit is OTP and was set either at the factory or by the first lk1st PASS boot.
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Consequence (hypothesis, NOT proven): with RST_n active, a glitch/low level on the eMMC RST_n line resets the card to pre-idle.
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If that happens between CMD1 and CMD2, it gives exactly the D2 pattern (CMD1 OK → CMD2 no response). Needs a scope on RST_n to test; not a priority at 1/10.
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- Bus in Linux HS200 is clean at runtime; does not explain CMD2 at 400 kHz identification either way.
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